【產(chǎn)品介紹】 Pin Names IO Loc IO Cell Char. Pin Description Power D0 PA0 IO IO 40 12mA, pullup-pe D0: SDRAM data bus bit 0, NAND/NOR/SRAM data bus bit 0 PA0: GPIO group A bit 0 VDDIOD1 PA1 IO IO 41 12mA, pullup-pe D1: SDRAM data bus bit 1, NAND/NOR/SRAM data bus bit 1 PA1: GPIO group A bit 1 VDDIOD2 PA2 IO IO 42 12mA, pullup-pe D2: SDRAM data bus bit 2, NAND/NOR/SRAM data bus bit 2 PA2: GPIO group A bit 2 VDDIOD3 PA3 IO IO 43 12mA, pullup-pe D3: SDRAM data bus bit 3, NAND/NOR/SRAM data bus bit 3 PA3: GPIO group A bit 3 VDDIOD4 PA4 IO IO 44 12mA, pullup-pe D4: SDRAM data bus bit 4, NAND/NOR/SRAM data bus bit 4 PA4: GPIO group A bit 4 VDDIOD5 PA5 IO IO 45 12mA, pullup-pe D5: SDRAM data bus bit 5, NAND/NOR/SRAM data bus bit 5 PA5: GPIO group A bit 5 VDDIOD6 PA6 IO IO 46 12mA, pullup-pe D6: SDRAM data bus bit 6, NAND/NOR/SRAM data bus bit 6 PA6: GPIO group A bit 6 VDDIOD7 PA7 IO IO 47 12mA, pullup-pe D7: SDRAM data bus bit 7, NAND/NOR/SRAM data bus bit 7 PA7: GPIO group A bit 7 VDDIOD8 PA8 IO IO 32 12mA, pullup-pe D8: SDRAM data bus bit 8, NAND/NOR/SRAM data bus bit 8 PA8: GPIO group A bit 8 VDDIOD9 PA9 IO IO 33 12mA, pullup-pe D9: SDRAM data bus bit 9, NAND/NOR/SRAM data bus bit 9 PA9: GPIO group A bit 9 VDDIOD10 PA10 IO IO 34 12mA, pullup-pe D10: SDRAM data bus bit 10, NAND/NOR/SRAM data bus bit 10 PA10: GPIO group A bit 10 VDDIOD11 PA11 IO IO 35 12mA, pullup-pe D11: SDRAM data bus bit 11, NAND/NOR/SRAM data bus bit 11 PA11: GPIO group A bit 11 VDDIOD12 PA12 IO IO 36 12mA, pullup-pe D12: SDRAM data bus bit 12, NAND/NOR/SRAM data bus bit 12 PA12: GPIO group A bit 12 VDDIOD13 PA13 IO IO 37 12mA, pullup-pe D13: SDRAM data bus bit 13, NAND/NOR/SRAM data bus bit 13 PA13: GPIO group A bit 13 VDDIOD14 PA14 IO IO 38 12mA, pullup-pe D14: SDRAM data bus bit 14, NAND/NOR/SRAM data bus bit 14 PA14: GPIO group A bit 14 VDDIOD15 PA15 IO IO 39 12mA, pullup-pe D15: SDRAM data bus bit 15, NAND/NOR/SRAM data bus bit 15 PA15: GPIO group A bit 15 VDDIOA0 PB0 O IO 8 12mA, pullup-pe A0: SDRAM address bus bit 0, NOR/SRAM address bus bit 0 PB0: GPIO group B bit 0 VDDIOA1 PB1 O IO 7 12mA, pullup-pe A1: SDRAM address bus bit 1, NOR/SRAM address bus bit 1 PB1: GPIO group B bit 1 VDDIOA2 PB2 O IO 6 12mA, pullup-pe A2: SDRAM address bus bit 2, NOR/SRAM address bus bit 2 PB2: GPIO group B bit 2 VDDIOA3 PB3 O IO 5 12mA, pullup-pe A3: SDRAM address bus bit 3, NOR/SRAM address bus bit 3 PB3: GPIO group B bit 3 VDDIOA4 PB4 O IO 29 12mA, pullup-pe A4: SDRAM address bus bit 4, NOR/SRAM address bus bit 4 PB4: GPIO group B bit 4 VDDIOA5 PB5 O IO 28 12mA, pullup-pe A5: SDRAM address bus bit 5, NOR/SRAM address bus bit 5 PB5: GPIO group B bit 5 VDDIOA6 PB6 O IO 27 12mA, pullup-pe A6: SDRAM address bus bit 6, NOR/SRAM address bus bit 6 PB6: GPIO group B bit 6 VDDIOA7 PB7O IO2612mA, pullup-pe A7: SDRAM address bus bit 7, NOR/SRAM address bus bit 7 PB7: GPIO group B bit 7 VDDIOA8 PB8 O IO 23 12mA, pullup-pe A8: SDRAM address bus bit 8, NOR/SRAM address bus bit 8 PB8: GPIO group B bit 8 VDDIOA9 PB9 O IO 22 12mA, pullup-pe A9: SDRAM address bus bit 9, NOR/SRAM address bus bit 9 PB9: GPIO group B bit 9 VDDIOA10 PB10 O IO 9 12mA, pullup-pe A10: SDRAM address bus bit 10, NOR/SRAM address bus bit 10 PB10: GPIO group B bit 10 VDDIOA11 PB11 O IO 19 12mA, pullup-pe A11: SDRAM address bus bit 11, NOR/SRAM address bus bit 11 PB11: GPIO group B bit 11 VDDIOA12 PB12 O IO 18 12mA, pullup-pe A12: SDRAM address bus bit 12, NOR/SRAM address bus bit 12 PB12: GPIO group B bit 12 VDDIOA13 PB13 O IO 30 12mA, pullup-pe A13: SDRAM address bus bit 13, NOR/SRAM address bus bit 13 PB13: GPIO group B bit 13 VDDIOA14 PB14 O IO 31 12mA, pullup-pe A14: SDRAM address bus bit 14, NOR/SRAM address bus bit 14 PB14: GPIO group B bit 14 VDDIODCS_ PB16 O IO 10 8mA, pullup-pe DCS_: SDRAM chip select PB16: GPIO group B bit 16 VDDIORAS_ PB17 O IO 11 8mA, pullup-pe RAS_: SDRAM row address strobe PB17: GPIO group B bit 17 VDDIOCAS_ PB18 O IO 12 8mA, pullup-pe CAS_: SDRAM column address strobe PB18: GPIO group B bit 18 VDDIOSDWE_ BUFD_ PB19 O IO 13 12mA, pullup-pe SDWE_: SDRAM write enable BUFD_: Select CPU to SRAM chip direction in data bi-direction buffer PB19: GPIO group B bit 19 VDDIOWE0_ PB20 O IO 14 8mA, pullup-pe WE0_: SDRAM/NOR/SRAM byte 0 write enable PB20: GPIO group B bit 20 VDDIOWE1_ PB21 O IO 15 8mA, pullup-pe WE1_: SDRAM/NOR/SRAM byte 1 write enable PB21: GPIO group B bit 21 VDDIOCKO PB24 O IO 16 12mA, pullup-pe CKO: SDRAM clockPB24: GPIO group B bit 24 VDDIOCKE PB25 O IO178mA, pullup-pe CKE: SDRAM clock enable PB25: GPIO group B bit 25VDDIO 我公司服務(wù)宗旨:“以質(zhì)量求生存,以服務(wù)求發(fā)展”.我們以熱忱的服務(wù),良好信譽(yù)和強(qiáng)大的技術(shù)支持,竭誠為國內(nèi)外電子界人士提供價(jià)廉優(yōu)質(zhì)的產(chǎn)品和配貨服務(wù)。 聯(lián)系方式： 網(wǎng)址：http://www.ckfuse.com 聯(lián)系人：詹先生 Q Q ：2355878200 （Q群交流：51605428） 聯(lián)系電話：0755-83955578-804 傳真：0755-83045179 地址：深圳市福田區(qū)華強(qiáng)北路華聯(lián)發(fā)大廈西座504室